/*
nzonehtmlhaxx is licensed under the MIT license:
Copyright (c) 2010 yellowstar6

Permission is hereby granted, free of charge, to any person obtaining a copy of this
software and associated documentation files (the Software), to deal in the Software
without restriction, including without limitation the rights to use, copy, modify, merge,
publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons
to whom the Software is furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice shall be included in all copies
or substantial portions of the Software.

THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE
FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
*/

#include "common.h"

#include "arm9stub_bin.h"
#include "arm7stub_bin.h"
#include "ndsloader_lz.h"
//#include "ndsloader_nds.h"

#define ARM9STUBVMA 0x023fe000

int DSi_mode = 0;

void __attribute__ ((long_call)) resetArm9();
void bootstrapArm7();
void ndsloadstub();
void bootstrapArm7DSiSync();
void arm9stub() /*__attribute__ ((long_call))*/;
void arm9stub_poolend() /*__attribute__ ((long_call))*/;
void arm7stub();
void arm7stub_poolend();
int sendipcmsg(u32 channel, u32 data);

int main(void)
{
	#ifdef TWL
	if(((*((vu32*)0x04004000)) & 3)==1)DSi_mode = 1;
	#endif
	resetArm9();
	bootstrapArm7();
	while(1);
	return 0;
}

void __attribute__ ((long_call)) resetArm9()
{
	int i;
	
	for(i=0; i<4; i++)
	{
		DMA_CR(i) = 0;//Reset DMA.
		DMA_SRC(i) = 0;
		DMA_DEST(i) = 0;
		TIMER_CR(i) = 0;//Reset timers.
		TIMER_DATA(i) = 0;
		if(DSi_mode)*((u32*)(0x04004104 + (i*0x1c))) = 0;//Reset NDMA.
	}

	VRAM_CR = (VRAM_CR & 0xffff0000) | 0x00008080;//This is from bootloader.
	
	//This DMA gfx reset code is from bootloader boot.c.
	dmaFillWords( 0, (void*)0x04000000, 0x56);  //clear main display registers
	dmaFillWords( 0, (void*)0x04001000, 0x56);  //clear sub  display registers

	REG_DISPSTAT = 0;
	REG_DISPCNT = 0;
	REG_DISPCNT_SUB = 0;

	for(i=0; i<7; i++)//Reset VRAM.
	{
		if(i==2)continue;
		((vu8*)0x04000240)[i] = 0;
	}
	VRAM_H_CR = 0;
	VRAM_I_CR = 0;

	memset((void*)0x05000000, 0, 0x800);//Clear palettes.
	memset((void*)0x07000000, 0, 0x800);//Clear OAM.

	REG_POWERCNT = 0x820f;
	WRAM_CR = 0x03;
}

void bootstrapArm7()
{
	REG_IME = 1;
	while(sendipcmsg(12, 0x10<<8)<0);
	while(REG_VCOUNT!=192);//Wait for Arm7 to enter TWL SDK bootstub, by waiting for a vblank.
	while(REG_VCOUNT==192);
	REG_IME = 0;

	#ifdef DS_STATION
	*((vu32*)0x027e3ffc) = 0;//Disable the IRQ handler.
	#endif
	#ifdef TWL
	*((vu32*)0x02fe3ffc) = 0;
	#endif

	if(DSi_mode)bootstrapArm7DSiSync();
	while(IPC_GetSync()!=1);
	IPC_SendSync(1);
	
	#ifdef DS_STATION
	memset_addrs((void*)0x027ffd80, (void*)0x027ffe00);//Not sure if this clearing code is really needed, Nintendo clears this memory when bootstrapping.
	#endif
	#ifdef TWL
	memset_addrs((void*)0x02fffd80, (void*)0x02fffe00);
	#endif

	#if defined(DS_STATION)
	memset_addrs((void*)0x027fff80, (void*)0x027fff98);
	*((vu16*)0x027fff98) = 0;
	#endif
	#if defined(TWL)
	memset_addrs((void*)0x02ffff80, (void*)0x02ffff98);
	*((vu16*)0x02ffff98) = 0;
	#endif

	#if defined(DS_STATION)
	memset_addrs((void*)0x027fff9c, (void*)0x02800000);
	#endif
	#if defined(TWL)
	memset_addrs((void*)0x02ffff9c, (void*)0x03000000);
	#endif

	while(IPC_GetSync()==1);
	ndsloadstub();
}

void ndsloadstub()
{
	*((u32*)0x022ffffc) = (u32)&resetArm9;
	void (*func_ptr)(void) = (void*)/*ARM9STUBVMA*/arm9stub_bin;
	swiDecompressLZSSWram((void*)ndsloader_lz, (void*)0x02300000);
	//memcpy((void*)0x02300000, (void*)ndsloader_nds, ndsloader_nds_size);
	DC_FlushAll();
	DC_InvalidateAll();
	IC_InvalidateAll();

	BOOTFLAG = 0;
	VRAM_C_CR = VRAM_ENABLE | VRAM_C_LCD;
	NDSHEADER->arm7executeAddress = 0x06000000;
	memcpy16((void*)ARM9STUBVMA, arm9stub_bin, arm9stub_bin_size);
	memcpy16(VRAM_C, arm7stub_bin, arm7stub_bin_size);
	VRAM_C_CR = VRAM_ENABLE | VRAM_C_ARM7_0x06000000;

	DC_FlushAll();
	DC_InvalidateAll();
	IC_InvalidateAll();
	func_ptr();
}

void bootstrapArm7DSiSync()
{
	vu16 *sync = (vu16*)0x02fffc24;
	vu16 temp;

	sync[2] = 3;//When this is 3, Arm7 TWL SDK bootstub skips 7i bin loading, otherwise when 2 it loads the 7i bin.
	//sync[2] = 2;

	temp = sync[1];
	do
	{
		sync[0]++;
		
	} while(sync[1]==temp);

	temp = sync[1];
	do
	{
		sync[0]++;
		
	} while(sync[1]==temp);
}

/*int sendipcmsg(u32 channel, u32 data)
{
	//if((REG_IPC_FIFO_CR & IPC_FIFO_ERROR) || (REG_IPC_FIFO_CR & IPC_FIFO_SEND_FULL))return -1;
	REG_IPC_FIFO_TX = (channel & 0x1f) | (data<<6);
	return 0;
}*/

void* memset(void* buffer, int val, size_t len)
{
	vu32 *buf = (vu32*)buffer;
	while(len>0)
	{
		*buf = val;
		buf++;
		len-=4;
	}
	return buffer;
}

void* memcpy(void* a, const void* b, size_t len)
{
	vu32 *bufa = (vu32*)a;
	vu32 *bufb = (vu32*)b;
	while(len>0)
	{
		*bufa = *bufb;
		bufa++;
		bufb++;
		len-=4;
	}
	return a;
}

void* memcpy16(void* a, const void* b, size_t len)
{
	vu16 *bufa = (vu16*)a;
	vu16 *bufb = (vu16*)b;
	while(len>0)
	{
		*bufa = *bufb;
		bufa++;
		bufb++;
		len-=2;
	}
	return a;
}

void memset_addrs(void* start, void* end)
{
	memset(start, 0, ((int)end - (int)start));
}

void memcpy_addrs(void* start, void* end, void* dst)
{
	memcpy(dst, start, ((int)end - (int)start));
}

void memcpy16_addrs(void* start, void* end, void* dst)
{
	memcpy16(dst, start, ((int)end - (int)start));
}

